PCI Express® CAN Interface
2 or 4 high-speed CAN interfaces according to ISO11898-2
Bus mastering and local data management through FPGA
esd Advanced CAN Core (esdACC) technology
PCIe port according to PCI Express Specification R1.0a
Error simulation support (e.g. CAN Error Injection)
Advanced CAN diagnostic
Powerful CAN Interface for PCs
The CAN-PCIe/400 is a PC board designed for the PCI Express bus featuring two (CAN-PCIe/400-2) or four (CAN-PCIe/400-4) CAN High-Speed interfaces according to ISO 11898-2.
The CAN-PCIe/400-4 comes with two additional CAN interfaces via a separate slot bracket.
CAN Data Management
The independent CAN nets according to ISO 11898-1 are driven by the esdACC (esd Advanced CAN Core), implemented in the Xilinx Spartan 3e FPGA. Controlled by the FPGA, the CAN-PCIe/400 supports bus mastering as an initiator, meaning that it is capable of initiating write cycles to the host CPU’s RAM independently of the CPU or the system DMA controller. The result is a reduction of overall latency time on servicing I/O transactions in particular at higher data rates and reduced host CPU load.
The CAN-PCIe/400 provides high resolution hardware timestamps.
CAN Error injection on request.
CAN layer 2 (CAN-API) software drivers are available for Windows, Linux, VxWorks, QNX and RTX supporting up to 24 CAN nets.
The CANopen software package is available for Windows, Linux, VxWorks and QNX.
Drivers for other operating systems are available on request.